1. Field of the Invention
The present invention relates to an improvement of highly integrated structure of charge coupled devices and to an improvement of highly integrated structure of solid state sensing devices employing charge coupled devices. The present invention is also related to a device.
2. Description of the Background Art
A solid state image sensing device is used in a TV camera, a video camera and so on, which converts optical images into electrical signals to pickup the images. A charge transfer device is used as an apparatus for transferring the converted electrical signals in a prescribed operation.
A charge transfer device transfers charges stored on a surface of or in a semiconductor successively to a prescribed direction along the surface. The charge transfer devices are applied to solid state image sensing devices, memories and so on. There are two types of charge transfer devices having different types of transfer electrodes. One type of the charge transfer device has a unitary transfer gate extending continuously along the direction of the charge transfer. The charge transfer device of this type is disclosed in, for example, U.S. Pat. No. 4,760,273. Another type of charge transfer device has a plurality of transfer electrodes arranged along the direction of charge transfer. The charge transfer device of this type is called a charge coupled device (CCD), and the present invention is related to the CCD. When a plurality of MOS capacitors are arranged close to each other so that the depletion regions of the capacitors are overlapped with each other and potential wells are coupled with each other, externally applied charges are transferred as charge packets from positions having higher potential to positions having lower potential. The CCD utilizes the above described phenomenon. More specifically, when a clock voltage is applied to gate electrodes of a number of charge coupled MOS capacitors, charge packets are successively transferred along a channel formed on a surface of a semiconductor substrate.
A planar type CCD has been known in which MOS capacitors are arranged on a main surface of a semiconductor substrate along the direction of transfer to form a charge transfer region. Now, in a CCD employed in a solid state image sensing device, a photosensitive region and the charge transfer region of the CCD are arranged in two dimensions on the main surface of the semiconductor substrate. In such a solid state image sensing device, the degree of integration and opening ratio must be increased to improve resolution and sensitivity. The opening ratio means the proportion of the area of the photosensitive region occupying the surface of the substrate. The degree of integration means the number of elements included in a unit area. However, as the degree of integration becomes higher, the proportion of the surface area occupied by the CCD is increased and the opening ratio is lowered. Consequently, the sensitivity is lowered, preventing the improvement of resolution.
In view of the foregoing, a CCD having a structure enabling higher degree of integration has been proposed. Such a CCD is disclosed in, for example, Japanese Patent Laying-Open Gazette NO. 290175/1987. FIG. 12 is a perspective cross sectional view showing the structure of the CCD shown in the above mentioned gazette and FIG. 13 is a plan view of the structure. A plurality of trenches 2b, 2c, 2d and 2e extending parallel to each other are formed on a main surface of a p type silicon substrate. An insulating film 3 formed of silicon oxide is formed over the surface of the p type silicon substrate 1 and inner surfaces of the trenches 2b to 2e. Electrodes 4b, 4c, 4d and 4e elongated along the trenches are formed in the trenches 2b to 2e. Channel regions 5 of n type impurity regions are formed in contact with the inner surfaces of the trenches 2b to 2e in the p type silicon substrate 1. Each of the channel region 5 is divided into four regions I to IV. The regions I and II are opposed to an electrode 4a with an insulating film 3 interposed therebetween. The region I is an n.sup.- region and the region II is an n region. The regions III and IV are formed opposed to the electrode 4b with the insulating film 3 interposed therebetween. The region III is an n.sup.- region and the region IV is an n region. A portion of the region II is in contact with a portion of the region III. The electrodes 4a, 4c and 4e are connected to source .phi.1, while the electrodes 4b and 4d are connected to a clock pulse source .phi.2. Clock voltages having different phases are applied from the clock pulse sources .phi.1 and .phi.2. In operation, the charges stored in the channel regions 5 are successively transferred in the direction of the arrow 6 in accordance with the height of the potential wells formed by the high level voltage VH and the low level voltage VL applied from the clock pulse sources .phi.1 and .phi.2.
As described above, in the prior art, a trench is formed on a main surface of a substrate, transfer electrodes are formed therein and a channel region is formed on a sidewall of the trench in order to realize the fine structure of a CCD. The fine structure is realized by reducing horizontal area occupied by the charge transfer region formed on the main surface of the silicon substrate.
An example of the prior art will be described with reference to FIGS. 14 and 15 in which the degree of integration is increased to enhance the resolution in a solid state image sensing apparatus employing CCDs. This example is disclosed in, for example, Japanese Patent Laying-Open Gazette No. 51254/1987. Referring to FIGS. 14 and 15, the solid state image sensing device comprises an arrangement of photosensitive regions 8 and vertical charge transfer regions 9 formed on a surface of a silicon substrate 7. Each of the photosensitive region 8 comprises a p well region 10 provided on the n type silicon substrate 7 and an n type impurity region 11 formed on the surface of the region 10, thereby providing a pn junction. Photoelectric charges excited by light entering the photosensitive region 8 are stored in the pn junction region. A plurality of electrodes are arranged adjacent to the photosensitive regions 8 in the direction of the column of FIG. 14, thereby providing CCDs of the vertical charge transfer regions 9. The electrodes 4 are connected to each other in the low direction by means of leads 12. The electrode 4 is formed in a trench 2 provided on the main surface of the silicon substrate 7 with an insulating film 3 interposed therebetween. A plurality of electrodes are aligned in the column direction, and end portions of alternate electrodes are laid over upper portions of the remaining ones of the electrodes. Every other ones of the electrodes 4 have gate electrode portions 13 for transferring the photoelectric charges stored in the photosensitive regions 8 to the n channel regions 5 of the CCDs. An n type impurity region 5 forming the n channel region is formed in the inner surface region of the trench 2.
As described above, the solid state image sensing device of the prior art comprises a plurality of photosensitive regions 8 arranged in a matrix and CCDs (vertical charge transfer regions 9) for transferring the photoelectric charges generated in the photosensitive regions 8 in the vertical direction, each of which connected to each of the photosensitive regions 8. The CCDs are alternately aligned with the lines of the plurality of photosensitive regions 8 arranged in the column direction. By providing the electrode 4 and the n channel region 5 for charge transfer of the CCD in the trench 2, the horizontal area occupied by the vertical charge transfer region 9 is reduced, thereby improving the opening ratio of the photosensitive region 8.
The operation of the solid state image sensing device of the above described prior art will be described in the following. The light entering the photosensitive region 8 excites photoelectric charges in this region, and the photoelectric charges are stored in the pn junction region. When a positive pulse is applied to the electrode 4 having the gate electrode portion 13, an n channel (not shown) is formed on the surface of the silicon substrate below the gate electrode portion 13, so that the charges stored in the photosensitive region 8 are transferred to the n channel region 5 of the CCD. Thereafter, a driving clock signal is applied to the plurality of electrodes 4, whereby the charges stored in the n channel regions 5 of the CCD are transferred in the vertical (column) direction through the n channel region 5. When all the charges of 1 pixel are transferred in the vertical direction, the charges of 1 pixel are transferred to the CCD for horizontal transfer (not shown) on the end portion of CCD for vertical transfer and then transferred in the horizontal (row) direction. When the charges transferred to the CCD for horizontal transfer are transferred in the horizontal direction to be outputted, then the driving clock signal is again applied to the plurality of electrodes 4. Therefore, the charges are transferred in the vertical direction by 1 pixel, the charges of 1 pixel on the end portion of the CCD for vertical transfer are transferred to the CCD for horizontal transfer, and they are transferred in the horizontal direction by the CCD for horizontal transfer to be outputted. By the repetition of the above described operation, output signals corresponding to the light incidental to the photosensitive regions 8 are provided.
AS described above, in the conventional CCD or in the solid state image sensing device employing CCDs, trenches are formed in the surface of the silicon substrate, and the CCDs are formed in the trenches in order to realize highly integrated structure or fine structure and to reduce the horizontal area of occupation. However, these structures are only partial modifications of the conventional planar type structure, which is formed in the trench in the substrate surface. Therefore, in the above described solid state image sensing device, the horizontal arrangement of the photosensitive regions and the charge transfer regions is the same as in the conventional planar type structure. Therefore, the reduction of the horizontal area occupied by the charge transfer regions on the surface of the substrate and the improvement of the degree of integration are limited.